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The Co-Processor Architecture: An Embedded System Architecture for Rapid Prototyping

November 18 @ 6:00 PM - 8:00 PM MST

Although well known for its digital processing performance and throughput, the co-processor architecture provides the embedded systems designer opportunities to implement project management strategies, which improve both development costs and time to market. This paper, focused specifically upon the combination of a discrete microcontroller (MCU) and a discrete field-programmable gate array (FPGA), showcases how this architecture lends itself to an efficient and iterative design process. Leveraging researched sources, empirical findings, and case studies, the benefits of this architecture are explored and exemplary applications are provided. Upon this paper’s conclusion, the embedded systems designer will have a better understanding of when and how to implement this versatile hardware architecture. Speaker(s): Noah Madinger, Agenda: 6:00 pm Short business meeting and announcements 6:15 pm Presentation Room: Devereux/Hach Room, Rialto Theater Center, 228 E 4th Street, Loveland, Colorado, United States, 80537, Virtual: https://events.vtools.ieee.org/m/286781

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